
1: ; Hitachi SHmedia instruction set description. -*- Scheme -*- 2: ; 3: ; Copyright 2000, 2001, 2007 Free Software Foundation, Inc. 4: ; 5: ; Contributed by Red Hat Inc; developed under contract from Hitachi 6: ; Semiconductor (America) Inc. 7: ; 8: ; This file is part of the GNU Binutils. 9: ; 10: ; This program is free software; you can redistribute it and/or modify 11: ; it under the terms of the GNU General Public License as published by 12: ; the Free Software Foundation; either version 3 of the License, or 13: ; (at your option) any later version. 14: ; 15: ; This program is distributed in the hope that it will be useful, 16: ; but WITHOUT ANY WARRANTY; without even the implied warranty of 17: ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18: ; GNU General Public License for more details. 19: ; 20: ; You should have received a copy of the GNU General Public License 21: ; along with this program; if not, write to the Free Software 22: ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 23: ; MA 02110-1301, USA. 24: 25: ^L 26: ; dshmf -- define-normal-sh-media-field 27: 28: (define-pmacro (dshmf xname xcomment ignored xstart xlength) 29: (dnf xname xcomment ((ISA media)) xstart xlength)) 30: 31: ; dshmop -- define-normal-sh-media-operand 32: 33: (define-pmacro (dshmop xname xcomment ignored xhardware xfield) 34: (dnop xname xcomment ((ISA media)) xhardware xfield)) 35: 36: ; dnshmi -- define-normal-sh-media-insn 37: 38: (define-pmacro (dshmi xname xcomment xattrs xsyntax xformat xsemantics) 39: (define-insn 40: (name xname) 41: (comment xcomment) 42: (.splice attrs (.unsplice xattrs) (ISA media)) 43: (syntax xsyntax) 44: (format xformat) 45: (semantics xsemantics))) 46: 47: ; Saturation functions. 48: ; Force a value `i' into words `n' bits wide. 49: ; See Hitachi SH-5 CPU core, volume 2, p. 25 for details. 50: 51: ; saturate -- signed saturatation function 52: 53: (define-pmacro (saturate mode n i) 54: (if mode (lt i (neg mode (sll mode 1 (sub n 1)))) 55: (neg (sll mode 1 (sub n 1))) 56: (if mode (lt i (sll mode 1 (sub n 1))) 57: i 58: (sub mode (sll mode 1 (sub n 1)) 1)))) 59: 60: ; usaturate -- unsigned saturation function 61: 62: (define-pmacro (usaturate mode n i) 63: (if mode (lt i (const mode 0)) 64: (const mode 0) 65: (if mode (lt i (sll mode 1 n)) 66: i 67: (sub mode (sll mode 1 n) 1)))) 68: 69: ^L 70: ; Ifields. 71: 72: (dshmf f-op "Opcode" () 31 6) 73: (dshmf f-ext "Extension opcode" () 19 4) 74: (dshmf f-rsvd "Reserved" (RESERVED) 3 4) 75: 76: (dshmf f-left "Left register" () 25 6) 77: (dshmf f-right "Right register" () 15 6) 78: (dshmf f-dest "Destination register" () 9 6) 79: 80: (define-multi-ifield 81: (name f-left-right) 82: (comment "Left and right matched register pair") 83: (attrs (ISA media)) 84: (mode UINT) 85: (subfields f-left f-right) 86: (insert (sequence () 87: (set (ifield f-left) 88: (and (ifield f-left-right) 63)) 89: (set (ifield f-right) 90: (and (ifield f-left-right) 63)))) 91: (extract (set (ifield f-left-right) (ifield f-left))) 92: ) 93: 94: (dshmf f-tra "Target register" () 6 3) 95: (dshmf f-trb "Target register" () 22 3) 96: (dshmf f-likely "Likely bit" () 9 1) 97: (dshmf f-25 "Three unused bits at bit 25" () 25 3) 98: (dshmf f-8-2 "Two unused bits at bit 8" () 8 2) 99: 100: (df f-imm6 "Immediate value (6 bits)" ((ISA media)) 15 6 INT #f #f) 101: (df f-imm10 "Immediate value (10 bits)" ((ISA media)) 19 10 INT #f #f) 102: (df f-imm16 "Immediate value (16 bits)" ((ISA media)) 25 16 INT #f #f) 103: 104: (dshmf f-uimm6 "Immediate value (6 bits)" () 15 6) 105: (dshmf f-uimm16 "Immediate value (16 bits)" () 25 16) 106: 107: ; Various displacement fields. 108: ; The 10 bit field, for example, has different scaling for displacements. 109: 110: (df f-disp6 "Displacement (6 bits)" ((ISA media)) 15 6 INT #f #f) 111: 112: (df f-disp6x32 "Displacement (6 bits)" ((ISA media)) 15 6 INT 113: ((value pc) (sra SI value 5)) 114: ((value pc) (sll SI value 5))) 115: 116: (df f-disp10 "Displacement (10 bits)" ((ISA media)) 19 10 INT #f #f) 117: 118: (df f-disp10x8 "Displacement (10 bits)" ((ISA media)) 19 10 INT 119: ((value pc) (sra SI value 3)) 120: ((value pc) (sll SI value 3))) 121: 122: (df f-disp10x4 "Displacement (10 bits)" ((ISA media)) 19 10 INT 123: ((value pc) (sra SI value 2)) 124: ((value pc) (sll SI value 2))) 125: 126: (df f-disp10x2 "Displacement (10 bits)" ((ISA media)) 19 10 INT 127: ((value pc) (sra SI value 1)) 128: ((value pc) (sll SI value 1))) 129: 130: (df f-disp16 "Displacement (16 bits)" ((ISA media) PCREL-ADDR) 25 16 INT 131: ((value pc) (sra DI value 2)) 132: ((value pc) (add DI (sll DI value 2) pc))) 133: 134: ^L 135: ; Operands. 136: 137: (dshmop rm "Left general purpose reg" () h-gr f-left) 138: (dshmop rn "Right general purpose reg" () h-gr f-right) 139: (dshmop rd "Destination general purpose reg" () h-gr f-dest) 140: 141: (dshmop frg "Left single precision register" () h-fr f-left) 142: (dshmop frh "Right single precision register" () h-fr f-right) 143: (dshmop frf "Destination single precision reg" () h-fr f-dest) 144: (dshmop frgh "Single precision register pair" () h-fr f-left-right) 145: 146: (dshmop fpf "Pair of single precision registers" () h-fp f-dest) 147: 148: (dshmop fvg "Left single precision vector" () h-fv f-left) 149: (dshmop fvh "Right single precision vector" () h-fv f-right) 150: (dshmop fvf "Destination single precision vector" () h-fv f-dest) 151: (dshmop mtrxg "Left single precision matrix" () h-fmtx f-left) 152: 153: (dshmop drg "Left double precision register" () h-dr f-left) 154: (dshmop drh "Right double precision register" () h-dr f-right) 155: (dshmop drf "Destination double precision reg" () h-dr f-dest) 156: (dshmop drgh "Double precision register pair" () h-dr f-left-right) 157: 158: (dshmop fpscr "Floating point status register" () h-fpscr f-nil) 159: (dshmop crj "Control register j" () h-cr f-dest) 160: (dshmop crk "Control register k" () h-cr f-left) 161: 162: (dshmop tra "Target register a" () h-tr f-tra) 163: (dshmop trb "Target register b" () h-tr f-trb) 164: 165: (dshmop disp6 "Displacement (6 bits)" () h-sint f-disp6) 166: (dshmop disp6x32 "Displacement (6 bits, scale 32)" () h-sint f-disp6x32) 167: (dshmop disp10 "Displacement (10 bits)" () h-sint f-disp10) 168: (dshmop disp10x2 "Displacement (10 bits, scale 2)" () h-sint f-disp10x2) 169: (dshmop disp10x4 "Displacement (10 bits, scale 4)" () h-sint f-disp10x4) 170: (dshmop disp10x8 "Displacement (10 bits, scale 8)" () h-sint f-disp10x8) 171: (dshmop disp16 "Displacement (16 bits)" () h-sint f-disp16) 172: 173: (dshmop imm6 "Immediate (6 bits)" () h-sint f-imm6) 174: (dshmop imm10 "Immediate (10 bits)" () h-sint f-imm10) 175: (dshmop imm16 "Immediate (16 bits)" () h-sint f-imm16) 176: (dshmop uimm6 "Immediate (6 bits)" () h-uint f-uimm6) 177: (dshmop uimm16 "Unsigned immediate (16 bits)" () h-uint f-uimm16) 178: 179: ; FIXME: provide these parse/print functions in `sh-media.opc'. 180: 181: (define-operand (name likely) (comment "Likely branch?") (attrs (ISA media)) 182: (type h-uint) (index f-likely) (handlers (parse "likely") (print "likely"))) 183: 184: ^L 185: ; Instructions. 186: 187: (dshmi add "Add" 188: () 189: "add $rm, $rn, $rd" 190: (+ (f-op 0) rm (f-ext 9) rn rd (f-rsvd 0)) 191: (set rd (add rm rn))) 192: 193: (dshmi addl "Add long" 194: () 195: "add.l $rm, $rn, $rd" 196: (+ (f-op 0) rm (f-ext 8) rn rd (f-rsvd 0)) 197: (set rd (add (subword SI rm 1) (subword SI rn 1)))) 198: 199: (dshmi addi "Add immediate" 200: () 201: "addi $rm, $disp10, $rd" 202: (+ (f-op 52) rm disp10 rd (f-rsvd 0)) 203: (set rd (add rm (ext DI disp10)))) 204: 205: (dshmi addil "Add immediate long" 206: () 207: "addi.l $rm, $disp10, $rd" 208: (+ (f-op 53) rm disp10 rd (f-rsvd 0)) 209: (set rd (ext DI (add (ext SI disp10) (subword SI rm 1))))) 210: 211: (dshmi addzl "Add zero extended long" 212: () 213: "addz.l $rm, $rn, $rd" 214: (+ (f-op 0) rm (f-ext 12) rn rd (f-rsvd 0)) 215: (set rd (zext DI (add (subword SI rm 1) (subword SI rn 1))))) 216: 217: (dshmi alloco "Allocate operand cache block" 218: () 219: "alloco $rm, $disp6x32" 220: (+ (f-op 56) rm (f-ext 4) disp6x32 (f-dest 63) (f-rsvd 0)) 221: (unimp "alloco")) 222: 223: (dshmi and "AND" 224: () 225: "and $rm, $rn, $rd" 226: (+ (f-op 1) rm (f-ext 11) rn rd (f-rsvd 0)) 227: (set rd (and rm rn))) 228: 229: (dshmi andc "AND complement" 230: () 231: "andc $rm, $rn, $rd" 232: (+ (f-op 1) rm (f-ext 15) rn rd (f-rsvd 0)) 233: (set rd (and rm (inv rn)))) 234: 235: (dshmi andi "AND immediate" 236: () 237: "andi $rm, $disp10, $rd" 238: (+ (f-op 54) rm disp10 rd (f-rsvd 0)) 239: (set rd (and rm (ext DI disp10)))) 240: 241: (dshmi beq "Branch if equal" 242: () 243: "beq$likely $rm, $rn, $tra" 244: (+ (f-op 25) rm (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0)) 245: (if (eq rm rn) 246: (set pc tra))) 247: 248: (dshmi beqi "Branch if equal immediate" 249: () 250: "beqi$likely $rm, $imm6, $tra" 251: (+ (f-op 57) rm (f-ext 1) imm6 likely (f-8-2 0) tra (f-rsvd 0)) 252: (if (eq rm (ext DI imm6)) 253: (set pc tra))) 254: 255: (dshmi bge "Branch if greater than or equal" 256: () 257: "bge$likely $rm, $rn, $tra" 258: (+ (f-op 25) rm (f-ext 3) rn likely (f-8-2 0) tra (f-rsvd 0)) 259: (if (ge rm rn) 260: (set pc tra))) 261: 262: (dshmi bgeu "Branch if greater than or equal (unsigned comparison)" 263: () 264: "bgeu$likely $rm, $rn, $tra" 265: (+ (f-op 25) rm (f-ext 11) rn likely (f-8-2 0) tra (f-rsvd 0)) 266: (if (geu rm rn) 267: (set pc tra))) 268: 269: (dshmi bgt "Branch greater than" 270: () 271: "bgt$likely $rm, $rn, $tra" 272: (+ (f-op 25) rm (f-ext 7) rn likely (f-8-2 0) tra (f-rsvd 0)) 273: (if (gt rm rn) 274: (set pc tra))) 275: 276: (dshmi bgtu "Branch greater than (unsigned comparison)" 277: () 278: "bgtu$likely $rm, $rn, $tra" 279: (+ (f-op 25) rm (f-ext 15) rn likely (f-8-2 0) tra (f-rsvd 0)) 280: (if (gtu rm rn) 281: (set pc tra))) 282: 283: (dshmi blink "Branch and link" 284: () 285: "blink $trb, $rd" 286: (+ (f-op 17) (f-25 0) trb (f-ext 1) (f-right 63) rd (f-rsvd 0)) 287: (sequence () 288: (set rd (or (add pc 4) 1)) 289: (set pc trb))) 290: 291: (dshmi bne "Branch if not equal" 292: () 293: "bne$likely $rm, $rn, $tra" 294: (+ (f-op 25) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0)) 295: (if (ne rm rn) 296: (set pc tra))) 297: 298: (dshmi bnei "Branch if not equal immediate" 299: () 300: "bnei$likely $rm, $imm6, $tra" 301: (+ (f-op 57) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0)) 302: (if (ne rm (ext DI imm6)) 303: (set pc tra))) 304: 305: (dshmi brk "Breakpoint instruction" 306: () 307: "brk" 308: (+ (f-op 27) (f-left 63) (f-ext 5) (f-right 63) (f-dest 63) (f-rsvd 0)) 309: (c-call "sh64_break" pc)) 310: 311: (define-pmacro (-byterev-step) 312: (sequence () 313: (set result (or (sll result 8) (and source 255))) 314: (set source (srl source 8))) 315: ) 316: 317: (dshmi byterev "Byte reverse" 318: () 319: "byterev $rm, $rd" 320: (+ (f-op 0) rm (f-ext 15) (f-right 63) rd (f-rsvd 0)) 321: (sequence ((DI source) (DI result)) 322: (set source rm) 323: (set result 0) 324: (-byterev-step) 325: (-byterev-step) 326: (-byterev-step) 327: (-byterev-step) 328: (-byterev-step) 329: (-byterev-step) 330: (-byterev-step) 331: (-byterev-step) 332: (set rd result))) 333: 334: (dshmi cmpeq "Compare equal" 335: () 336: "cmpeq $rm, $rn, $rd" 337: (+ (f-op 0) rm (f-ext 1) rn rd (f-rsvd 0)) 338: (set rd (if DI (eq rm rn) 1 0))) 339: 340: (dshmi cmpgt "Compare greater than" 341: () 342: "cmpgt $rm, $rn, $rd" 343: (+ (f-op 0) rm (f-ext 3) rn rd (f-rsvd 0)) 344: (set rd (if DI (gt rm rn) 1 0))) 345: 346: (dshmi cmpgtu "Compare greater than (unsigned comparison)" 347: () 348: "cmpgtu $rm,$rn, $rd" 349: (+ (f-op 0) rm (f-ext 7) rn rd (f-rsvd 0)) 350: (set rd (if DI (gtu rm rn) 1 0))) 351: 352: (dshmi cmveq "Conditional move if equal to zero" 353: () 354: "cmveq $rm, $rn, $rd" 355: (+ (f-op 8) rm (f-ext 1) rn rd (f-rsvd 0)) 356: (if (eq rm 0) 357: (set rd rn))) 358: 359: (dshmi cmvne "Conditional move if not equal to zero" 360: () 361: "cmvne $rm, $rn, $rd" 362: (+ (f-op 8) rm (f-ext 5) rn rd (f-rsvd 0)) 363: (if (ne rm 0) 364: (set rd rn))) 365: 366: (dshmi fabsd "Floating point absolute (double)" 367: () 368: "fabs.d $drgh, $drf" 369: (+ (f-op 6) drgh (f-ext 1) drf (f-rsvd 0)) 370: (set drf (c-call DF "sh64_fabsd" drgh))) 371: 372: (dshmi fabss "Floating point absolute (single)" 373: () 374: "fabs.s $frgh, $frf" 375: (+ (f-op 6) frgh (f-ext 0) frf (f-rsvd 0)) 376: (set frf (c-call SF "sh64_fabss" frgh))) 377: 378: (dshmi faddd "Floating point add (double)" 379: () 380: "fadd.d $drg, $drh, $drf" 381: (+ (f-op 13) drg (f-ext 1) drh drf (f-rsvd 0)) 382: (set drf (c-call DF "sh64_faddd" drg drh))) 383: 384: (dshmi fadds "Floating point add (single)" 385: () 386: "fadd.s $frg, $frh, $frf" 387: (+ (f-op 13) frg (f-ext 0) frh frf (f-rsvd 0)) 388: (set frf (c-call SF "sh64_fadds" frg frh))) 389: 390: (dshmi fcmpeqd "Floating point compare if equal (double)" 391: () 392: "fcmpeq.d $drg, $drh, $rd" 393: (+ (f-op 12) drg (f-ext 9) drh rd (f-rsvd 0)) 394: (set rd (zext DI (c-call BI "sh64_fcmpeqd" drg drh)))) 395: 396: (dshmi fcmpeqs "Floating point compare if equal (single)" 397: () 398: "fcmpeq.s $frg, $frh, $rd" 399: (+ (f-op 12) frg (f-ext 8) frh rd (f-rsvd 0)) 400: (set rd (zext DI (c-call BI "sh64_fcmpeqs" frg frh)))) 401: 402: (dshmi fcmpged "Floating compare compare if greater than or equal (double)" 403: () 404: "fcmpge.d $drg, $drh, $rd" 405: (+ (f-op 12) drg (f-ext 15) drh rd (f-rsvd 0)) 406: (set rd (zext DI (c-call BI "sh64_fcmpged" drg drh)))) 407: 408: (dshmi fcmpges "Floating point compare if greater than or equal (single)" 409: () 410: "fcmpge.s $frg, $frh, $rd" 411: (+ (f-op 12) frg (f-ext 14) frh rd (f-rsvd 0)) 412: (set rd (zext DI (c-call BI "sh64_fcmpges" frg frh)))) 413: 414: (dshmi fcmpgtd "Floating point compare if greater than (double)" 415: () 416: "fcmpgt.d $drg, $drh, $rd" 417: (+ (f-op 12) drg (f-ext 13) drh rd (f-rsvd 0)) 418: (set rd (zext DI (c-call BI "sh64_fcmpgtd" drg drh)))) 419: 420: (dshmi fcmpgts "Floating point compare if greater than (single)" 421: () 422: "fcmpgt.s $frg, $frh, $rd" 423: (+ (f-op 12) frg (f-ext 12) frh rd (f-rsvd 0)) 424: (set rd (zext DI (c-call BI "sh64_fcmpgts" frg frh)))) 425: 426: (dshmi fcmpund "Floating point unordered comparison (double)" 427: () 428: "fcmpun.d $drg, $drh, $rd" 429: (+ (f-op 12) drg (f-ext 11) drh rd (f-rsvd 0)) 430: (set rd (zext DI (c-call BI "sh64_fcmpund" drg drh)))) 431: 432: (dshmi fcmpuns "Floating point unordered comparison (single)" 433: () 434: "fcmpun.s $frg, $frh, $rd" 435: (+ (f-op 12) frg (f-ext 10) frh rd (f-rsvd 0)) 436: (set rd (zext DI (c-call BI "sh64_fcmpuns" frg frh)))) 437: 438: (dshmi fcnvds "Floating point coversion (double to single)" 439: () 440: "fcnv.ds $drgh, $frf" 441: (+ (f-op 14) drgh (f-ext 7) frf (f-rsvd 0)) 442: (set frf (c-call SF "sh64_fcnvds" drgh))) 443: 444: (dshmi fcnvsd "Floating point conversion (single to double)" 445: () 446: "fcnv.sd $frgh, $drf" 447: (+ (f-op 14) frgh (f-ext 6) drf (f-rsvd 0)) 448: (set drf (c-call DF "sh64_fcnvsd" frgh))) 449: 450: (dshmi fdivd "Floating point divide (double)" 451: () 452: "fdiv.d $drg, $drh, $drf" 453: (+ (f-op 13) drg (f-ext 5) drh drf (f-rsvd 0)) 454: (set drf (c-call DF "sh64_fdivd" drg drh))) 455: 456: (dshmi fdivs "Floating point divide (single)" 457: () 458: "fdiv.s $frg, $frh, $frf" 459: (+ (f-op 13) frg (f-ext 4) frh frf (f-rsvd 0)) 460: (set frf (c-call SF "sh64_fdivs" frg frh))) 461: 462: (dshmi fgetscr "Floating point get from FPSCR" 463: () 464: "fgetscr $frf" 465: (+ (f-op 7) (f-left 63) (f-ext 2) (f-right 63) frf (f-rsvd 0)) 466: (unimp "fputscr")) 467: ; FIXME: this should work! 468: ; (set frf fpscr)) 469: 470: (dshmi fiprs "Floating point inner product (single)" 471: () 472: "fipr.s $fvg, $fvh, $frf" 473: (+ (f-op 5) fvg (f-ext 6) fvh frf (f-rsvd 0)) 474: (sequence ((UQI g) (UQI h) (SF temp)) 475: (set g (index-of fvg)) 476: (set h (index-of fvh)) 477: (set temp (c-call SF "sh64_fmuls" (reg h-fr g) (reg h-fr h))) 478: (set temp (c-call SF "sh64_fadds" temp 479: (c-call SF "sh64_fmuls" (reg h-fr (add g 1)) (reg h-fr (add h 1))))) 480: (set temp (c-call SF "sh64_fadds" temp 481: (c-call SF "sh64_fmuls" (reg h-fr (add g 2)) (reg h-fr (add h 2))))) 482: (set temp (c-call SF "sh64_fadds" temp 483: (c-call SF "sh64_fmuls" (reg h-fr (add g 3)) (reg h-fr (add h 3))))) 484: (set frf temp))) 485: 486: (dshmi fldd "Floating point load (double)" 487: () 488: "fld.d $rm, $disp10x8, $drf" 489: (+ (f-op 39) rm disp10x8 drf (f-rsvd 0)) 490: (set drf (mem DF (add rm disp10x8)))) 491: 492: (dshmi fldp "Floating point load (pair of singles)" 493: () 494: "fld.p $rm, $disp10x8, $fpf" 495: (+ (f-op 38) rm disp10x8 fpf (f-rsvd 0)) 496: (sequence ((QI f)) 497: (set f (index-of fpf)) 498: (set (reg h-fr f) (mem SF (add rm disp10x8))) 499: (set (reg h-fr (add f 1)) (mem SF (add rm (add disp10x8 4)))))) 500: 501: (dshmi flds "Floating point load (single)" 502: () 503: "fld.s $rm, $disp10x4, $frf" 504: (+ (f-op 37) rm disp10x4 frf (f-rsvd 0)) 505: (set frf (mem SF (add rm disp10x4)))) 506: 507: (dshmi fldxd "Floating point extended load (double)" 508: () 509: "fldx.d $rm, $rn, $drf" 510: (+ (f-op 7) rm (f-ext 9) rn frf (f-rsvd 0)) 511: (set drf (mem DF (add rm rn)))) 512: 513: (dshmi fldxp "Floating point extended load (pair of singles)" 514: () 515: "fldx.p $rm, $rn, $fpf" 516: (+ (f-op 7) rm (f-ext 13) rn fpf (f-rsvd 0)) 517: (sequence ((QI f)) 518: (set f (index-of fpf)) 519: (set (reg h-fr f) (mem SF (add rm rn))) 520: (set (reg h-fr (add f 1)) (mem SF (add rm (add rn 4)))))) 521: 522: (dshmi fldxs "Floating point extended load (single)" 523: () 524: "fldx.s $rm, $rn, $frf" 525: (+ (f-op 7) rm (f-ext 8) rn frf (f-rsvd 0)) 526: (set frf (mem SF (add rm rn)))) 527: 528: (dshmi floatld "Floating point conversion (long to double)" 529: () 530: "float.ld $frgh, $drf" 531: (+ (f-op 14) frgh (f-ext 14) drf (f-rsvd 0)) 532: (set drf (c-call DF "sh64_floatld" frgh))) 533: 534: (dshmi floatls "Floating point conversion (long to single)" 535: () 536: "float.ls $frgh, $frf" 537: (+ (f-op 14) frgh (f-ext 12) frf (f-rsvd 0)) 538: (set frf (c-call SF "sh64_floatls" frgh))) 539: 540: (dshmi floatqd "Floating point conversion (quad to double)" 541: () 542: "float.qd $drgh, $drf" 543: (+ (f-op 14) drgh (f-ext 13) drf (f-rsvd 0)) 544: (set drf (c-call DF "sh64_floatqd" drgh))) 545: 546: (dshmi floatqs "Floating point conversion (quad to single)" 547: () 548: "float.qs $drgh, $frf" 549: (+ (f-op 14) drgh (f-ext 15) frf (f-rsvd 0)) 550: (set frf (c-call SF "sh64_floatqs" drgh))) 551: 552: (dshmi fmacs "Floating point multiply and accumulate (single)" 553: () 554: "fmac.s $frg, $frh, $frf" 555: (+ (f-op 13) frg (f-ext 14) frh frf (f-rsvd 0)) 556: (set frf (c-call SF "sh64_fadds" frf (c-call SF "sh64_fmuls" frg frh)))) 557: 558: (dshmi fmovd "Floating point move double" 559: () 560: "fmov.d $drgh, $drf" 561: (+ (f-op 14) drgh (f-ext 1) drf (f-rsvd 0)) 562: (set drf drgh)) 563: 564: (dshmi fmovdq "Floating point move (double to quad integer)" 565: () 566: "fmov.dq $drgh, $rd" 567: (+ (f-op 12) drgh (f-ext 1) rd (f-rsvd 0)) 568: (set rd (subword DI drgh 0))) 569: 570: (dshmi fmovls "Floating point move (lower to single)" 571: () 572: "fmov.ls $rm, $frf" 573: (+ (f-op 7) rm (f-ext 0) (f-right 63) frf (f-rsvd 0)) 574: (set frf (subword SF (subword SI rm 1) 0))) 575: 576: (dshmi fmovqd "Floating point move (quad to double)" 577: () 578: "fmov.qd $rm, $drf" 579: (+ (f-op 7) rm (f-ext 1) (f-right 63) frf (f-rsvd 0)) 580: (set drf (subword DF rm 0))) 581: 582: (dshmi fmovs "Floating point move (single)" 583: () 584: "fmov.s $frgh, $frf" 585: (+ (f-op 14) frgh (f-ext 0) frf (f-rsvd 0)) 586: (set frf frgh)) 587: 588: (dshmi fmovsl "Floating point move (single to lower)" 589: () 590: "fmov.sl $frgh, $rd" 591: (+ (f-op 12) frgh (f-ext 0) rd (f-rsvd 0)) 592: (set rd (ext DI (subword SI frgh 1)))) 593: 594: (dshmi fmuld "Floating point multiply (double)" 595: () 596: "fmul.d $drg, $drh, $drf" 597: (+ (f-op 13) drg (f-ext 7) drh drf (f-rsvd 0)) 598: (set drf (c-call DF "sh64_fmuld" drg drh))) 599: 600: (dshmi fmuls "Floating point multiply (single)" 601: () 602: "fmul.s $frg, $frh, $frf" 603: (+ (f-op 13) frg (f-ext 6) frh frf (f-rsvd 0)) 604: (set frf (c-call SF "sh64_fmuls" frg frh))) 605: 606: (dshmi fnegd "Floating point negate (double)" 607: () 608: "fneg.d $drgh, $drf" 609: (+ (f-op 6) drgh (f-ext 3) drf (f-rsvd 0)) 610: (set drf (c-call DF "sh64_fnegd" drgh))) 611: 612: (dshmi fnegs "Floating point negate (single)" 613: () 614: "fneg.s $frgh, $frf" 615: (+ (f-op 6) frgh (f-ext 2) frf (f-rsvd 0)) 616: (set frf (c-call SF "sh64_fnegs" frgh))) 617: 618: (dshmi fputscr "Floating point put to FPSCR" 619: () 620: "fputscr $frgh" 621: (+ (f-op 12) frgh (f-ext 2) (f-dest 63) (f-rsvd 0)) 622: (unimp "fputscr")) 623: ; FIXME: this should work! 624: ; (set fpscr (subword SI frgh 0))) 625: 626: (dshmi fsqrtd "Floating point square root (double)" 627: () 628: "fsqrt.d $drgh, $drf" 629: (+ (f-op 14) drgh (f-ext 5) drf (f-rsvd 0)) 630: (set drf (c-call DF "sh64_fsqrtd" drgh))) 631: 632: (dshmi fsqrts "Floating point squart root (single)" 633: () 634: "fsqrt.s $frgh, $frf" 635: (+ (f-op 14) frgh (f-ext 4) frf (f-rsvd 0)) 636: (set frf (c-call SF "sh64_fsqrts" frgh))) 637: 638: (dshmi fstd "Floating point store (double)" 639: () 640: "fst.d $rm, $disp10x8, $drf" 641: (+ (f-op 47) rm disp10x8 drf (f-rsvd 0)) 642: (set (mem DF (add rm disp10x8)) drf)) 643: 644: (dshmi fstp "Floating point store (pair of singles)" 645: () 646: "fst.p $rm, $disp10x8, $fpf" 647: (+ (f-op 46) rm disp10x8 fpf (f-rsvd 0)) 648: (sequence ((QI f)) 649: (set f (index-of fpf)) 650: (set (mem SF (add rm disp10x8)) (reg h-fr f)) 651: (set (mem SF (add rm (add disp10x8 4))) (reg h-fr (add f 1))))) 652: 653: (dshmi fsts "Floating point store (single)" 654: () 655: "fst.s $rm, $disp10x4, $frf" 656: (+ (f-op 45) rm disp10x4 frf (f-rsvd 0)) 657: (set (mem SF (add rm disp10x4)) frf)) 658: 659: (dshmi fstxd "Floating point extended store (double)" 660: () 661: "fstx.d $rm, $rn, $drf" 662: (+ (f-op 15) rm (f-ext 9) rn drf (f-rsvd 0)) 663: (set (mem DF (add rm rn)) drf)) 664: 665: (dshmi fstxp "Floating point extended store (pair of singles)" 666: () 667: "fstx.p $rm, $rn, $fpf" 668: (+ (f-op 15) rm (f-ext 13) rn fpf (f-rsvd 0)) 669: (sequence ((QI f)) 670: (set f (index-of fpf)) 671: (set (mem SF (add rm rn)) (reg h-fr f)) 672: (set (mem SF (add rm (add rn 4))) (reg h-fr (add f 1))))) 673: 674: (dshmi fstxs "Floating point extended store (single)" 675: () 676: "fstx.s $rm, $rn, $frf" 677: (+ (f-op 15) rm (f-ext 8) rn frf (f-rsvd 0)) 678: (set (mem SF (add rm rn)) frf)) 679: 680: (dshmi fsubd "Floating point subtract (double)" 681: () 682: "fsub.d $drg, $drh, $drf" 683: (+ (f-op 13) frg (f-ext 3) frh frf (f-rsvd 0)) 684: (set drf (c-call DF "sh64_fsubd" drg drh))) 685: 686: (dshmi fsubs "Floating point subtract (single)" 687: () 688: "fsub.s $frg, $frh, $frf" 689: (+ (f-op 13) frg (f-ext 2) frh frf (f-rsvd 0)) 690: (set frf (c-call SF "sh64_fsubs" frg frh))) 691: 692: (dshmi ftrcdl "Floating point conversion (double to long)" 693: () 694: "ftrc.dl $drgh, $frf" 695: (+ (f-op 14) drgh (f-ext 11) frf (f-rsvd 0)) 696: (set frf (c-call SF "sh64_ftrcdl" drgh))) 697: 698: (dshmi ftrcsl "Floating point conversion (single to long)" 699: () 700: "ftrc.sl $frgh, $frf" 701: (+ (f-op 14) frgh (f-ext 8) frf (f-rsvd 0)) 702: (set frf (c-call SF "sh64_ftrcsl" frgh))) 703: 704: (dshmi ftrcdq "Floating point conversion (double to quad)" 705: () 706: "ftrc.dq $drgh, $drf" 707: (+ (f-op 14) drgh (f-ext 9) frf (f-rsvd 0)) 708: (set drf (c-call DF "sh64_ftrcdq" drgh))) 709: 710: (dshmi ftrcsq "Floating point conversion (single to quad)" 711: () 712: "ftrc.sq $frgh, $drf" 713: (+ (f-op 14) frgh (f-ext 10) drf (f-rsvd 0)) 714: (set drf (c-call DF "sh64_ftrcsq" frgh))) 715: 716: (dshmi ftrvs "Floating point matrix multiply" 717: () 718: "ftrv.s $mtrxg, $fvh, $fvf" 719: (+ (f-op 5) mtrxg (f-ext 14) fvh fvf (f-rsvd 0)) 720: (c-call "sh64_ftrvs" (index-of mtrxg) (index-of fvh) (index-of fvf))) 721: 722: (dshmi getcfg "Get configuration register" 723: () 724: "getcfg $rm, $disp6, $rd" 725: (+ (f-op 48) rm (f-ext 15) disp6 rd (f-rsvd 0)) 726: (unimp "getcfg")) 727: 728: (dshmi getcon "Get control register" 729: () 730: "getcon $crk, $rd" 731: (+ (f-op 9) crk (f-ext 15) (f-right 63) rd (f-rsvd 0)) 732: (set rd crk)) 733: 734: (dshmi gettr "Get target register" 735: () 736: "gettr $trb, $rd" 737: (+ (f-op 17) (f-25 0) trb (f-ext 5) (f-right 63) rd (f-rsvd 0)) 738: (set rd trb)) 739: 740: (dshmi icbi "Invalidate instruction cache block" 741: () 742: "icbi $rm, $disp6x32" 743: (+ (f-op 56) rm (f-ext 5) disp6x32 (f-dest 63) (f-rsvd 0)) 744: (unimp "icbi")) 745: 746: (dshmi ldb "Load byte" 747: () 748: "ld.b $rm, $disp10, $rd" 749: (+ (f-op 32) rm disp10 rd (f-rsvd 0)) 750: (set rd (ext DI (mem QI (add rm (ext DI disp10)))))) 751: 752: (dshmi ldl "Load long word" 753: () 754: "ld.l $rm, $disp10x4, $rd" 755: (+ (f-op 34) rm disp10x4 rd (f-rsvd 0)) 756: (set rd (ext DI (mem SI (add rm (ext DI disp10x4)))))) 757: