1: /* ia64-opc.h -- IA-64 opcode table.
    2:    Copyright 1998, 1999, 2000, 2002, 2005, 2006, 2007
    3:    Free Software Foundation, Inc.
    4:    Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
    5: 
    6:    This file is part of the GNU opcodes library.
    7: 
    8:    This library is free software; you can redistribute it and/or modify
    9:    it under the terms of the GNU General Public License as published by
   10:    the Free Software Foundation; either version 3, or (at your option)
   11:    any later version.
   12: 
   13:    It is distributed in the hope that it will be useful, but WITHOUT
   14:    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   15:    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   16:    License for more details.
   17: 
   18:    You should have received a copy of the GNU General Public License
   19:    along with this file; see the file COPYING.  If not, write to the
   20:    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
   21:    MA 02110-1301, USA.  */
   22: 
   23: #ifndef IA64_OPC_H
   24: #define IA64_OPC_H
   25: 
   26: #include "opcode/ia64.h"
   27: 
   28: /* define a couple of abbreviations: */
   29: 
   30: #define bOp(x)  (((ia64_insn) ((x) & 0xf)) << 37)
   31: #define mOp     bOp (-1)
   32: #define Op(x)   bOp (x), mOp
   33: 
   34: #define FIRST           IA64_OPCODE_FIRST
   35: #define X_IN_MLX        IA64_OPCODE_X_IN_MLX
   36: #define LAST            IA64_OPCODE_LAST
   37: #define PRIV            IA64_OPCODE_PRIV
   38: #define NO_PRED         IA64_OPCODE_NO_PRED
   39: #define SLOT2           IA64_OPCODE_SLOT2
   40: #define PSEUDO          IA64_OPCODE_PSEUDO
   41: #define F2_EQ_F3        IA64_OPCODE_F2_EQ_F3
   42: #define LEN_EQ_64MCNT   IA64_OPCODE_LEN_EQ_64MCNT
   43: #define MOD_RRBS        IA64_OPCODE_MOD_RRBS
   44: #define POSTINC         IA64_OPCODE_POSTINC
   45: 
   46: #define AR_CCV  IA64_OPND_AR_CCV
   47: #define AR_PFS  IA64_OPND_AR_PFS
   48: #define AR_CSD  IA64_OPND_AR_CSD
   49: #define C1      IA64_OPND_C1
   50: #define C8      IA64_OPND_C8
   51: #define C16     IA64_OPND_C16
   52: #define GR0     IA64_OPND_GR0
   53: #define IP      IA64_OPND_IP
   54: #define PR      IA64_OPND_PR
   55: #define PR_ROT  IA64_OPND_PR_ROT
   56: #define PSR     IA64_OPND_PSR
   57: #define PSR_L   IA64_OPND_PSR_L
   58: #define PSR_UM  IA64_OPND_PSR_UM
   59: 
   60: #define AR3     IA64_OPND_AR3
   61: #define B1      IA64_OPND_B1
   62: #define B2      IA64_OPND_B2
   63: #define CR3     IA64_OPND_CR3
   64: #define F1      IA64_OPND_F1
   65: #define F2      IA64_OPND_F2
   66: #define F3      IA64_OPND_F3
   67: #define F4      IA64_OPND_F4
   68: #define P1      IA64_OPND_P1
   69: #define P2      IA64_OPND_P2
   70: #define R1      IA64_OPND_R1
   71: #define R2      IA64_OPND_R2
   72: #define R3      IA64_OPND_R3
   73: #define R3_2    IA64_OPND_R3_2
   74: 
   75: #define CPUID_R3 IA64_OPND_CPUID_R3
   76: #define DBR_R3  IA64_OPND_DBR_R3
   77: #define DTR_R3  IA64_OPND_DTR_R3
   78: #define ITR_R3  IA64_OPND_ITR_R3
   79: #define IBR_R3  IA64_OPND_IBR_R3
   80: #define MR3     IA64_OPND_MR3
   81: #define MSR_R3  IA64_OPND_MSR_R3
   82: #define PKR_R3  IA64_OPND_PKR_R3
   83: #define PMC_R3  IA64_OPND_PMC_R3
   84: #define PMD_R3  IA64_OPND_PMD_R3
   85: #define RR_R3   IA64_OPND_RR_R3
   86: 
   87: #define CCNT5   IA64_OPND_CCNT5
   88: #define CNT2a   IA64_OPND_CNT2a
   89: #define CNT2b   IA64_OPND_CNT2b
   90: #define CNT2c   IA64_OPND_CNT2c
   91: #define CNT5    IA64_OPND_CNT5
   92: #define CNT6    IA64_OPND_CNT6
   93: #define CPOS6a  IA64_OPND_CPOS6a
   94: #define CPOS6b  IA64_OPND_CPOS6b
   95: #define CPOS6c  IA64_OPND_CPOS6c
   96: #define IMM1    IA64_OPND_IMM1
   97: #define IMM14   IA64_OPND_IMM14
   98: #define IMM17   IA64_OPND_IMM17
   99: #define IMM22   IA64_OPND_IMM22
  100: #define IMM44   IA64_OPND_IMM44
  101: #define SOF     IA64_OPND_SOF
  102: #define SOL     IA64_OPND_SOL
  103: #define SOR     IA64_OPND_SOR
  104: #define IMM8    IA64_OPND_IMM8
  105: #define IMM8U4  IA64_OPND_IMM8U4
  106: #define IMM8M1  IA64_OPND_IMM8M1
  107: #define IMM8M1U4 IA64_OPND_IMM8M1U4
  108: #define IMM8M1U8 IA64_OPND_IMM8M1U8
  109: #define IMM9a   IA64_OPND_IMM9a
  110: #define IMM9b   IA64_OPND_IMM9b
  111: #define IMMU2   IA64_OPND_IMMU2
  112: #define IMMU21  IA64_OPND_IMMU21
  113: #define IMMU24  IA64_OPND_IMMU24
  114: #define IMMU62  IA64_OPND_IMMU62
  115: #define IMMU64  IA64_OPND_IMMU64
  116: #define IMMU5b  IA64_OPND_IMMU5b
  117: #define IMMU7a  IA64_OPND_IMMU7a
  118: #define IMMU7b  IA64_OPND_IMMU7b
  119: #define IMMU9   IA64_OPND_IMMU9
  120: #define INC3    IA64_OPND_INC3
  121: #define LEN4    IA64_OPND_LEN4
  122: #define LEN6    IA64_OPND_LEN6
  123: #define MBTYPE4 IA64_OPND_MBTYPE4
  124: #define MHTYPE8 IA64_OPND_MHTYPE8
  125: #define POS6    IA64_OPND_POS6
  126: #define TAG13   IA64_OPND_TAG13
  127: #define TAG13b  IA64_OPND_TAG13b
  128: #define TGT25   IA64_OPND_TGT25
  129: #define TGT25b  IA64_OPND_TGT25b
  130: #define TGT25c  IA64_OPND_TGT25c
  131: #define TGT64   IA64_OPND_TGT64
  132: 
  133: #endif