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21: #include <stdint.h>
22: #include <stdlib.h>
23: #include <stdio.h>
24:
25: #include "qemu.h"
26: #include "cpu.h"
27: #include "exec-all.h"
28:
29: #if !defined (CONFIG_USER_ONLY)
30:
31: static void pal_reset (CPUState *env);
32:
33: static void pal_console_call (CPUState *env, uint32_t palcode);
34:
35: static void pal_openvms_call (CPUState *env, uint32_t palcode);
36:
37: static void pal_unix_call (CPUState *env, uint32_t palcode);
38:
39: pal_handler_t pal_handlers[] = {
40:
41: {
42: .reset = &pal_reset,
43: .call_pal = &pal_console_call,
44: },
45:
46: {
47: .reset = &pal_reset,
48: .call_pal = &pal_openvms_call,
49: },
50:
51: {
52: .reset = &pal_reset,
53: .call_pal = &pal_unix_call,
54: },
55: };
56:
57: #if 0
58:
59: static void update_itb ()
60: {
61:
62: mtpr(TB_TAG);
63: mtpr(TB_CTL);
64:
65: mtpr(ITB_PTE);
66: }
67:
68: static void update_dtb ();
69: {
70: mtpr(TB_CTL);
71:
72: mtpr(TB_TAG);
73:
74: mtpr(DTB_PTE);
75: }
76: #endif
77:
78: static void pal_reset (CPUState *env)
79: {
80: }
81:
82: static void do_swappal (CPUState *env, uint64_t palid)
83: {
84: pal_handler_t *pal_handler;
85: int status;
86:
87: status = 0;
88: switch (palid) {
89: case 0 ... 2:
90: pal_handler = &pal_handlers[palid];
91: env->pal_handler = pal_handler;
92: env->ipr[IPR_PAL_BASE] = -1ULL;
93: (*pal_handler->reset)(env);
94: break;
95: case 3 ... 255:
96:
97: env->ir[0] = 1;
98: return;
99: default:
100:
101: env->pal_handler = NULL;
102: env->ipr[IPR_PAL_BASE] = palid;
103: env->pc = env->ipr[IPR_PAL_BASE];
104: cpu_loop_exit();
105: }
106: }
107:
108: static void pal_console_call (CPUState *env, uint32_t palcode)
109: {
110: uint64_t palid;
111:
112: if (palcode < 0x00000080) {
113:
114: if (!(env->ps >> 3)) {
115:
116: }
117: }
118: switch (palcode) {
119: case 0x00000000:
120:
121:
122: break;
123: case 0x00000001:
124:
125: break;
126: case 0x00000002:
127:
128:
129:
130: break;
131: case 0x00000009:
132:
133:
134: break;
135: case 0x0000000A:
136:
137:
138: palid = env->ir[16];
139: do_swappal(env, palid);
140: break;
141: case 0x00000080:
142:
143:
144: break;
145: case 0x00000081:
146:
147:
148: break;
149: case 0x00000086:
150:
151:
152:
153: break;
154: case 0x0000009E:
155:
156:
157: break;
158: case 0x0000009F:
159:
160:
161: break;
162: case 0x000000AA:
163:
164:
165: break;
166: default:
167: break;
168: }
169: }
170:
171: static void pal_openvms_call (CPUState *env, uint32_t palcode)
172: {
173: uint64_t palid, val, oldval;
174:
175: if (palcode < 0x00000080) {
176:
177: if (!(env->ps >> 3)) {
178:
179: }
180: }
181: switch (palcode) {
182: case 0x00000000:
183:
184:
185: break;
186: case 0x00000001:
187:
188: break;
189: case 0x00000002:
190:
191:
192:
193: break;
194: case 0x00000003:
195:
196: break;
197: case 0x00000004:
198:
199: break;
200: case 0x00000005:
201:
202: break;
203: case 0x00000006:
204:
205: if (cpu_alpha_mfpr(env, IPR_ASN, &val) == 0)
206: env->ir[0] = val;
207: break;
208: case 0x00000007:
209:
210: val = env->ir[16];
211: if (cpu_alpha_mtpr(env, IPR_ASTEN, val, &oldval) == 1)
212: env->ir[0] = val;
213: break;
214: case 0x00000008:
215:
216: val = env->ir[16];
217: if (cpu_alpha_mtpr(env, IPR_ASTSR, val, &oldval) == 1)
218: env->ir[0] = val;
219: break;
220: case 0x00000009:
221:
222:
223: break;
224: case 0x0000000A:
225:
226:
227: palid = env->ir[16];
228: do_swappal(env, palid);
229: break;
230: case 0x0000000B:
231:
232: if (cpu_alpha_mfpr(env, IPR_FEN, &val) == 0)
233: env->ir[0] = val;
234: break;
235: case 0x0000000C:
236:
237: val = env->ir[16];
238: if (cpu_alpha_mtpr(env, IPR_FEN, val, &oldval) == 1)
239: env->ir[0] = val;
240: break;
241: case 0x0000000D:
242:
243: val = env->ir[16];
244: if (cpu_alpha_mtpr(env, IPR_IPIR, val, &oldval) == 1)
245: env->ir[0] = val;
246: break;
247: case 0x0000000E:
248:
249: if (cpu_alpha_mfpr(env, IPR_IPL, &val) == 0)
250: env->ir[0] = val;
251: break;
252: case 0x0000000F:
253:
254: val = env->ir[16];
255: if (cpu_alpha_mtpr(env, IPR_IPL, val, &oldval) == 1)
256: env->ir[0] = val;
257: break;
258: case 0x00000010:
259:
260: if (cpu_alpha_mfpr(env, IPR_MCES, &val) == 0)
261: env->ir[0] = val;
262: break;
263: case 0x00000011:
264:
265: val = env->ir[16];
266: if (cpu_alpha_mtpr(env, IPR_MCES, val, &oldval) == 1)
267: env->ir[0] = val;
268: break;
269: case 0x00000012:
270:
271: if (cpu_alpha_mfpr(env, IPR_PCBB, &val) == 0)
272: env->ir[0] = val;
273: break;
274: case 0x00000013:
275:
276: if (cpu_alpha_mfpr(env, IPR_PRBR, &val) == 0)
277: env->ir[0] = val;
278: break;
279: case 0x00000014:
280:
281: val = env->ir[16];
282: if (cpu_alpha_mtpr(env, IPR_PRBR, val, &oldval) == 1)
283: env->ir[0] = val;
284: break;
285: case 0x00000015:
286:
287: if (cpu_alpha_mfpr(env, IPR_PTBR, &val) == 0)
288: env->ir[0] = val;
289: break;
290: case 0x00000016:
291:
292: if (cpu_alpha_mfpr(env, IPR_SCBB, &val) == 0)
293: env->ir[0] = val;
294: break;
295: case 0x00000017:
296:
297: val = env->ir[16];
298: if (cpu_alpha_mtpr(env, IPR_SCBB, val, &oldval) == 1)
299: env->ir[0] = val;
300: break;
301: case 0x00000018:
302:
303: val = env->ir[16];
304: if (cpu_alpha_mtpr(env, IPR_SIRR, val, &oldval) == 1)
305: env->ir[0] = val;
306: break;
307: case 0x00000019:
308:
309: if (cpu_alpha_mfpr(env, IPR_SISR, &val) == 0)
310: env->ir[0] = val;
311: break;
312: case 0x0000001A:
313:
314: if (cpu_alpha_mfpr(env, IPR_TBCHK, &val) == 0)
315: env->ir[0] = val;
316: break;
317: case 0x0000001B:
318:
319: val = env->ir[16];
320: if (cpu_alpha_mtpr(env, IPR_TBIA, val, &oldval) == 1)
321: env->ir[0] = val;
322: break;
323: case 0x0000001C:
324:
325: val = env->ir[16];
326: if (cpu_alpha_mtpr(env, IPR_TBIAP, val, &oldval) == 1)
327: env->ir[0] = val;
328: break;
329: case 0x0000001D:
330:
331: val = env->ir[16];
332: if (cpu_alpha_mtpr(env, IPR_TBIS, val, &oldval) == 1)
333: env->ir[0] = val;
334: break;
335: case 0x0000001E:
336:
337: if (cpu_alpha_mfpr(env, IPR_ESP, &val) == 0)
338: env->ir[0] = val;
339: break;
340: case 0x0000001F:
341:
342: val = env->ir[16];
343: if (cpu_alpha_mtpr(env, IPR_ESP, val, &oldval) == 1)
344: env->ir[0] = val;
345: break;
346: case 0x00000020:
347:
348: if (cpu_alpha_mfpr(env, IPR_SSP, &val) == 0)
349: env->ir[0] = val;
350: break;
351: case 0x00000021:
352:
353: val = env->ir[16];
354: if (cpu_alpha_mtpr(env, IPR_SSP, val, &oldval) == 1)
355: env->ir[0] = val;
356: break;
357: case 0x00000022:
358:
359: if (cpu_alpha_mfpr(env, IPR_USP, &val) == 0)
360: env->ir[0] = val;
361: break;
362: case 0x00000023:
363:
364: val = env->ir[16];
365: if (cpu_alpha_mtpr(env, IPR_USP, val, &oldval) == 1)
366: env->ir[0] = val;
367: break;
368: case 0x00000024:
369:
370: val = env->ir[16];
371: if (cpu_alpha_mtpr(env, IPR_TBISD, val, &oldval) == 1)
372: env->ir[0] = val;
373: break;
374: case 0x00000025:
375:
376: val = env->ir[16];
377: if (cpu_alpha_mtpr(env, IPR_TBISI, val, &oldval) == 1)
378: env->ir[0] = val;
379: break;
380: case 0x00000026:
381:
382: if (cpu_alpha_mfpr(env, IPR_ASTEN, &val) == 0)
383: env->ir[0] = val;
384: break;
385: case 0x00000027:
386:
387: if (cpu_alpha_mfpr(env, IPR_ASTSR, &val) == 0)
388: env->ir[0] = val;
389: break;
390: case 0x00000029:
391:
392: if (cpu_alpha_mfpr(env, IPR_VPTB, &val) == 0)
393: env->ir[0] = val;
394: break;
395: case 0x0000002A:
396:
397: val = env->ir[16];
398: if (cpu_alpha_mtpr(env, IPR_VPTB, val, &oldval) == 1)
399: env->ir[0] = val;
400: break;
401: case 0x0000002B:
402:
403: val = env->ir[16];
404: if (cpu_alpha_mtpr(env, IPR_PERFMON, val, &oldval) == 1)
405: env->ir[0] = val;
406: break;
407: case 0x0000002E:
408:
409: val = env->ir[16];
410: if (cpu_alpha_mtpr(env, IPR_DATFX, val, &oldval) == 1)
411: env->ir[0] = val;
412: break;
413: case 0x0000003E:
414:
415: break;
416: case 0x0000003F:
417:
418: if (cpu_alpha_mfpr(env, IPR_WHAMI, &val) == 0)
419: env->ir[0] = val;
420: break;
421: case 0x00000080:
422:
423:
424: break;
425: case 0x00000081:
426:
427:
428: break;
429: case 0x00000082:
430:
431: break;
432: case 0x00000083:
433:
434: break;
435: case 0x00000084:
436:
437: break;
438: case 0x00000085:
439:
440: break;
441: case 0x00000086:
442:
443:
444:
445: break;
446: case 0x00000087:
447:
448: break;
449: case 0x00000088:
450:
451: break;
452: case 0x00000089:
453:
454: break;
455: case 0x0000008A:
456:
457: break;
458: case 0x0000008B:
459:
460: break;
461: case 0x0000008C:
462:
463: break;
464: case 0x0000008D:
465:
466: break;
467: case 0x0000008E:
468:
469: break;
470: case 0x0000008F:
471:
472: break;
473: case 0x00000090:
474:
475: break;
476: case 0x00000091:
477:
478: break;
479: case 0x00000092:
480:
481: break;
482: case 0x00000093:
483:
484: break;
485: case 0x00000094:
486:
487: break;
488: case 0x00000095:
489:
490: break;
491: case 0x00000096:
492:
493: break;
494: case 0x00000097:
495:
496: break;
497: case 0x00000098:
498:
499: break;
500: case 0x00000099:
501:
502: break;
503: case 0x0000009A:
504:
505: break;
506: case 0x0000009B:
507:
508: break;
509: case 0x0000009C:
510:
511: break;
512: case 0x0000009D:
513:
514: break;
515: case 0x0000009E:
516:
517:
518: break;
519: case 0x0000009F:
520:
521:
522: break;
523: case 0x000000A0:
524:
525: break;
526: case 0x000000A1:
527:
528: break;
529: case 0x000000A2:
530:
531: break;
532: case 0x000000A3:
533:
534: break;
535: case 0x000000A4:
536:
537: break;
538: case 0x000000A5:
539:
540: break;
541: case 0x000000A6:
542:
543: break;
544: case 0x000000A7:
545:
546: break;
547: case 0x000000A8:
548:
549: break;
550: case 0x000000A9:
551:
552: break;
553: case 0x000000AA:
554:
555:
556: break;
557: case 0x000000AE:
558:
559: break;
560: default:
561: break;
562: }
563: }
564:
565: static void pal_unix_call (CPUState *env, uint32_t palcode)
566: {
567: uint64_t palid, val, oldval;
568:
569: if (palcode < 0x00000080) {
570:
571: if (!(env->ps >> 3)) {
572:
573: }
574: }
575: switch (palcode) {
576: case 0x00000000:
577:
578:
579: break;
580: case 0x00000001:
581:
582: break;
583: case 0x00000002:
584:
585:
586:
587: break;
588: case 0x00000009:
589:
590:
591: break;
592: case 0x0000000A:
593:
594:
595: palid = env->ir[16];
596: do_swappal(env, palid);
597: break;
598: case 0x0000000D:
599: