1: /*
    2:  * QEMU ES1370 emulation
    3:  *
    4:  * Copyright (c) 2005 Vassili Karpov (malc)
    5:  *
    6:  * Permission is hereby granted, free of charge, to any person obtaining a copy
    7:  * of this software and associated documentation files (the "Software"), to deal
    8:  * in the Software without restriction, including without limitation the rights
    9:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   10:  * copies of the Software, and to permit persons to whom the Software is
   11:  * furnished to do so, subject to the following conditions:
   12:  *
   13:  * The above copyright notice and this permission notice shall be included in
   14:  * all copies or substantial portions of the Software.
   15:  *
   16:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   17:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   18:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   19:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   20:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   21:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   22:  * THE SOFTWARE.
   23:  */
   24: 
   25: /* #define DEBUG_ES1370 */
   26: /* #define VERBOSE_ES1370 */
   27: #define SILENT_ES1370
   28: 
   29: #include "hw.h"
   30: #include "audiodev.h"
   31: #include "audio/audio.h"
   32: #include "pci.h"
   33: 
   34: /* Missing stuff:
   35:    SCTRL_P[12](END|ST)INC
   36:    SCTRL_P1SCTRLD
   37:    SCTRL_P2DACSEN
   38:    CTRL_DAC_SYNC
   39:    MIDI
   40:    non looped mode
   41:    surely more
   42: */
   43: 
   44: /*
   45:   Following macros and samplerate array were copied verbatim from
   46:   Linux kernel 2.4.30: drivers/sound/es1370.c
   47: 
   48:   Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
   49: */
   50: 
   51: /* Start blatant GPL violation */
   52: 
   53: #define ES1370_REG_CONTROL        0x00
   54: #define ES1370_REG_STATUS         0x04
   55: #define ES1370_REG_UART_DATA      0x08
   56: #define ES1370_REG_UART_STATUS    0x09
   57: #define ES1370_REG_UART_CONTROL   0x09
   58: #define ES1370_REG_UART_TEST      0x0a
   59: #define ES1370_REG_MEMPAGE        0x0c
   60: #define ES1370_REG_CODEC          0x10
   61: #define ES1370_REG_SERIAL_CONTROL 0x20
   62: #define ES1370_REG_DAC1_SCOUNT    0x24
   63: #define ES1370_REG_DAC2_SCOUNT    0x28
   64: #define ES1370_REG_ADC_SCOUNT     0x2c
   65: 
   66: #define ES1370_REG_DAC1_FRAMEADR    0xc30
   67: #define ES1370_REG_DAC1_FRAMECNT    0xc34
   68: #define ES1370_REG_DAC2_FRAMEADR    0xc38
   69: #define ES1370_REG_DAC2_FRAMECNT    0xc3c
   70: #define ES1370_REG_ADC_FRAMEADR     0xd30
   71: #define ES1370_REG_ADC_FRAMECNT     0xd34
   72: #define ES1370_REG_PHANTOM_FRAMEADR 0xd38
   73: #define ES1370_REG_PHANTOM_FRAMECNT 0xd3c
   74: 
   75: static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 };
   76: 
   77: #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2)
   78: #define DAC2_DIVTOSR(x) (1411200/((x)+2))
   79: 
   80: #define CTRL_ADC_STOP   0x80000000  /* 1 = ADC stopped */
   81: #define CTRL_XCTL1      0x40000000  /* electret mic bias */
   82: #define CTRL_OPEN       0x20000000  /* no function, can be read and written */
   83: #define CTRL_PCLKDIV    0x1fff0000  /* ADC/DAC2 clock divider */
   84: #define CTRL_SH_PCLKDIV 16
   85: #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
   86: #define CTRL_M_SBB      0x00004000  /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */
   87: #define CTRL_WTSRSEL    0x00003000  /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */
   88: #define CTRL_SH_WTSRSEL 12
   89: #define CTRL_DAC_SYNC   0x00000800  /* 1 = DAC2 runs off DAC1 clock */
   90: #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
   91: #define CTRL_M_CB       0x00000200  /* recording source: 0 = ADC, 1 = MPEG */
   92: #define CTRL_XCTL0      0x00000100  /* 0 = Line in, 1 = Line out */
   93: #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
   94: #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
   95: #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
   96: #define CTRL_ADC_EN     0x00000010  /* enable ADC */
   97: #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
   98: #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port (presumably at address 0x200) */
   99: #define CTRL_CDC_EN     0x00000002  /* enable serial (CODEC) interface */
  100: #define CTRL_SERR_DIS   0x00000001  /* 1 = disable PCI SERR signal */
  101: 
  102: #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
  103: #define STAT_CSTAT      0x00000400  /* 1 = codec busy or codec write in progress */
  104: #define STAT_CBUSY      0x00000200  /* 1 = codec busy */
  105: #define STAT_CWRIP      0x00000100  /* 1 = codec write in progress */
  106: #define STAT_VC         0x00000060  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
  107: #define STAT_SH_VC      5
  108: #define STAT_MCCB       0x00000010  /* CCB int pending */
  109: #define STAT_UART       0x00000008  /* UART int pending */
  110: #define STAT_DAC1       0x00000004  /* DAC1 int pending */
  111: #define STAT_DAC2       0x00000002  /* DAC2 int pending */
  112: #define STAT_ADC        0x00000001  /* ADC int pending */
  113: 
  114: #define USTAT_RXINT     0x80        /* UART rx int pending */
  115: #define USTAT_TXINT     0x04        /* UART tx int pending */
  116: #define USTAT_TXRDY     0x02        /* UART tx ready */
  117: #define USTAT_RXRDY     0x01        /* UART rx ready */
  118: 
  119: #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
  120: #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
  121: #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
  122: #define UCTRL_CNTRL     0x03        /* control field */
  123: #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
  124: 
  125: #define SCTRL_P2ENDINC    0x00380000  /*  */
  126: #define SCTRL_SH_P2ENDINC 19
  127: #define SCTRL_P2STINC     0x00070000  /*  */
  128: #define SCTRL_SH_P2STINC  16
  129: #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
  130: #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
  131: #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
  132: #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
  133: #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
  134: #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
  135: #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
  136: #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
  137: #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
  138: #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
  139: #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
  140: #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
  141: #define SCTRL_R1FMT       0x00000030  /* format mask */
  142: #define SCTRL_SH_R1FMT    4
  143: #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
  144: #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
  145: #define SCTRL_P2FMT       0x0000000c  /* format mask */
  146: #define SCTRL_SH_P2FMT    2
  147: #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
  148: #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
  149: #define SCTRL_P1FMT       0x00000003  /* format mask */
  150: #define SCTRL_SH_P1FMT    0
  151: 
  152: /* End blatant GPL violation */
  153: 
  154: #define NB_CHANNELS 3
  155: #define DAC1_CHANNEL 0
  156: #define DAC2_CHANNEL 1
  157: #define ADC_CHANNEL 2
  158: 
  159: #define IO_READ_PROTO(n) \
  160: static uint32_t n (void *opaque, uint32_t addr)
  161: #define IO_WRITE_PROTO(n) \
  162: static void n (void *opaque, uint32_t addr, uint32_t val)
  163: 
  164: static void es1370_dac1_callback (void *opaque, int free);
  165: static void es1370_dac2_callback (void *opaque, int free);
  166: static void es1370_adc_callback (void *opaque, int avail);
  167: 
  168: #ifdef DEBUG_ES1370
  169: 
  170: #define ldebug(...) AUD_log ("es1370", __VA_ARGS__)
  171: 
  172: static void print_ctl (uint32_t val)
  173: {
  174:     char buf[1024];
  175: 
  176:     buf[0] = '\0';
  177: #define a(n) if (val & CTRL_##n) strcat (buf, " "#n)
  178:     a (ADC_STOP);
  179:     a (XCTL1);
  180:     a (OPEN);
  181:     a (MSFMTSEL);
  182:     a (M_SBB);
  183:     a (DAC_SYNC);
  184:     a (CCB_INTRM);
  185:     a (M_CB);
  186:     a (XCTL0);
  187:     a (BREQ);
  188:     a (DAC1_EN);
  189:     a (DAC2_EN);
  190:     a (ADC_EN);
  191:     a (UART_EN);
  192:     a (JYSTK_EN);
  193:     a (CDC_EN);
  194:     a (SERR_DIS);
  195: #undef a
  196:     AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n",
  197:              (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV,
  198:              DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
  199:              dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
  200:              buf);
  201: }
  202: 
  203: static void print_sctl (uint32_t val)
  204: {
  205:     static const char *fmt_names[] = {"8M", "8S", "16M", "16S"};
  206:     char buf[1024];
  207: 
  208:     buf[0] = '\0';
  209: 
  210: #define a(n) if (val & SCTRL_##n) strcat (buf, " "#n)
  211: #define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n)
  212:     b (R1LOOPSEL);
  213:     b (P2LOOPSEL);
  214:     b (P1LOOPSEL);
  215:     a (P2PAUSE);
  216:     a (P1PAUSE);
  217:     a (R1INTEN);
  218:     a (P2INTEN);
  219:     a (P1INTEN);
  220:     a (P1SCTRLD);
  221:     a (P2DACSEN);
  222:     if (buf[0]) {
  223:         strcat (buf, "\n        ");
  224:     }
  225:     else {
  226:         buf[0] = ' ';
  227:         buf[1] = '\0';
  228:     }
  229: #undef b
  230: #undef a
  231:     AUD_log ("es1370",
  232:              "%s"
  233:              "p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
  234:              buf,
  235:              (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC,
  236:              (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC,
  237:              fmt_names [(val >> SCTRL_SH_R1FMT) & 3],
  238:              fmt_names [(val >> SCTRL_SH_P2FMT) & 3],
  239:              fmt_names [(val >> SCTRL_SH_P1FMT) & 3]
  240:         );
  241: }
  242: #else
  243: #define ldebug(...)
  244: #define print_ctl(...)
  245: #define print_sctl(...)
  246: #endif
  247: 
  248: #ifdef VERBOSE_ES1370
  249: #define dolog(...) AUD_log ("es1370", __VA_ARGS__)
  250: #else
  251: #define dolog(...)
  252: #endif
  253: 
  254: #ifndef SILENT_ES1370
  255: #define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__)
  256: #else
  257: #define lwarn(...)
  258: #endif
  259: 
  260: struct chan {
  261:     uint32_t shift;
  262:     uint32_t leftover;
  263:     uint32_t scount;
  264:     uint32_t frame_addr;
  265:     uint32_t frame_cnt;
  266: };
  267: 
  268: typedef struct ES1370State {
  269:     PCIDevice *pci_dev;
  270: 
  271:     QEMUSoundCard card;
  272:     struct chan chan[NB_CHANNELS];
  273:     SWVoiceOut *dac_voice[2];
  274:     SWVoiceIn *adc_voice;
  275: 
  276:     uint32_t ctl;
  277:     uint32_t status;
  278:     uint32_t mempage;
  279:     uint32_t codec;
  280:     uint32_t sctl;
  281: } ES1370State;
  282: 
  283: typedef struct PCIES1370State {
  284:     PCIDevice dev;
  285:     ES1370State es1370;
  286: } PCIES1370State;
  287: 
  288: struct chan_bits {
  289:     uint32_t ctl_en;
  290:     uint32_t stat_int;
  291:     uint32_t sctl_pause;
  292:     uint32_t sctl_inten;
  293:     uint32_t sctl_fmt;
  294:     uint32_t sctl_sh_fmt;
  295:     uint32_t sctl_loopsel;
  296:     void (*calc_freq) (ES1370State *s, uint32_t ctl,
  297:                        uint32_t *old_freq, uint32_t *new_freq);
  298: };
  299: 
  300: static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
  301:                                    uint32_t *old_freq, uint32_t *new_freq);
  302: static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
  303:                                            uint32_t *old_freq,
  304:                                            uint32_t *new_freq);
  305: 
  306: static const struct chan_bits es1370_chan_bits[] = {
  307:     {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN,
  308:      SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL,
  309:      es1370_dac1_calc_freq},
  310: 
  311:     {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN,
  312:      SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL,
  313:      es1370_dac2_and_adc_calc_freq},
  314: 
  315:     {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN,
  316:      SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL,
  317:      es1370_dac2_and_adc_calc_freq}
  318: };
  319: 
  320: static void es1370_update_status (ES1370State *s, uint32_t new_status)
  321: {
  322:     uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC);
  323: 
  324:     if (level) {
  325:         s->status = new_status | STAT_INTR;
  326:     }
  327:     else {
  328:         s->status = new_status & ~STAT_INTR;
  329:     }
  330:     qemu_set_irq(s->pci_dev->irq[0], !!level);
  331: }
  332: 
  333: static void es1370_reset (ES1370State *s)
  334: {
  335:     size_t i;
  336: 
  337:     s->ctl = 1;
  338:     s->status = 0x60;
  339:     s->mempage = 0;
  340:     s->codec = 0;
  341:     s->sctl = 0;
  342: 
  343:     for (i = 0; i < NB_CHANNELS; ++i) {
  344:         struct chan *d = &s->chan[i];
  345:         d->scount = 0;
  346:         d->leftover = 0;
  347:         if (i == ADC_CHANNEL) {
  348:             AUD_close_in (&s->card, s->adc_voice);
  349:             s->adc_voice = NULL;
  350:         }
  351:         else {
  352:             AUD_close_out (&s->card, s->dac_voice[i]);
  353:             s->dac_voice[i] = NULL;
  354:         }
  355:     }
  356:     qemu_irq_lower(s->pci_dev->irq[0]);
  357: }
  358: 
  359: static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl)
  360: {
  361:     uint32_t new_status = s->status;
  362: 
  363:     if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) {
  364:         new_status &= ~STAT_DAC1;
  365:     }
  366: 
  367:     if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) {
  368:         new_status &= ~STAT_DAC2;
  369:     }
  370: 
  371:     if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) {
  372:         new_status &= ~STAT_ADC;
  373:     }
  374: 
  375:     if (new_status != s->status) {
  376:         es1370_update_status (s, new_status);
  377:     }
  378: }
  379: 
  380: static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
  381:                                    uint32_t *old_freq, uint32_t *new_freq)
  382: 
  383: {
  384:     *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
  385:     *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
  386: }
  387: 
  388: static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
  389:                                            uint32_t *old_freq,
  390:                                            uint32_t *new_freq)
  391: 
  392: {
  393:     uint32_t old_pclkdiv, new_pclkdiv;
  394: 
  395:     new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
  396:     old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
  397:     *new_freq = DAC2_DIVTOSR (new_pclkdiv);
  398:     *old_freq = DAC2_DIVTOSR (old_pclkdiv);
  399: }
  400: 
  401: static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl)
  402: {
  403:     size_t i;
  404:     uint32_t old_freq, new_freq, old_fmt, new_fmt;
  405: 
  406:     for (i = 0; i < NB_CHANNELS; ++i) {
  407:         struct chan *d = &s->chan[i];
  408:         const struct chan_bits *b = &es1370_chan_bits[i];
  409: 
  410:         new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
  411:         old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
  412: 
  413:         b->calc_freq (s, ctl, &old_freq, &new_freq);
  414: 
  415:         if ((old_fmt != new_fmt) || (old_freq != new_freq)) {
  416:             d->shift = (new_fmt & 1) + (new_fmt >> 1);
  417:             ldebug ("channel %d, freq = %d, nchannels %d, fmt %d, shift %d\n",
  418:                     i,
  419:                     new_freq,
  420:                     1 << (new_fmt & 1),
  421:                     (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8,
  422:                     d->shift);
  423:             if (new_freq) {
  424:                 audsettings_t as;
  425: 
  426:                 as.freq = new_freq;
  427:                 as.nchannels = 1 << (new_fmt & 1);
  428:                 as.fmt = (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8;
  429:                 as.endianness = 0;
  430: 
  431:                 if (i == ADC_CHANNEL) {
  432:                     s->adc_voice =
  433:                         AUD_open_in (
  434:                             &s->card,
  435:                             s->adc_voice,
  436:                             "es1370.adc",
  437:                             s,
  438:                             es1370_adc_callback,
  439:                             &as
  440:                             );
  441:                 }
  442:                 else {
  443:                     s->dac_voice[i] =
  444:                         AUD_open_out (
  445:                             &s->card,
  446:                             s->dac_voice[i],
  447:                             i ? "es1370.dac2" : "es1370.dac1",
  448:                             s,
  449:                             i ? es1370_dac2_callback : es1370_dac1_callback,
  450:                             &as
  451:                             );
  452:                 }
  453:             }
  454:         }
  455: 
  456:         if (((ctl ^ s->ctl) & b->ctl_en)
  457:             || ((sctl ^ s->sctl) & b->sctl_pause)) {
  458:             int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause);
  459: 
  460:             if (i == ADC_CHANNEL) {
  461:                 AUD_set_active_in (s->adc_voice, on);
  462:             }
  463:             else {
  464:                 AUD_set_active_out (s->dac_voice[i], on);
  465:             }
  466:         }
  467:     }
  468: 
  469:     s->ctl = ctl;
  470:     s->sctl = sctl;
  471: }
  472: 
  473: static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr)
  474: {
  475:     addr &= 0xff;
  476:     if (addr >= 0x30 && addr <= 0x3f)
  477:         addr |= s->mempage << 8;
  478:     return addr;
  479: }
  480: 
  481: IO_WRITE_PROTO (es1370_writeb)
  482: {
  483:     ES1370State *s = opaque;
  484:     uint32_t shift, mask;
  485: 
  486:     addr = es1370_fixup (s, addr);
  487: 
  488:     switch (addr) {
  489:     case ES1370_REG_CONTROL:
  490:     case ES1370_REG_CONTROL + 1:
  491:     case ES1370_REG_CONTROL + 2:
  492:     case ES1370_REG_CONTROL + 3:
  493:         shift = (addr - ES1370_REG_CONTROL) << 3;
  494:         mask = 0xff << shift;
  495:         val = (s->ctl & ~mask) | ((val & 0xff) << shift);
  496:         es1370_update_voices (s, val, s->sctl);
  497:         print_ctl (val);
  498:         break;
  499:     case ES1370_REG_MEMPAGE:
  500:         s->mempage = val;
  501:         break;
  502:     case ES1370_REG_SERIAL_CONTROL:
  503:     case ES1370_REG_SERIAL_CONTROL + 1:
  504:     case ES1370_REG_SERIAL_CONTROL + 2:
  505:     case ES1370_REG_SERIAL_CONTROL + 3:
  506:         shift = (addr - ES1370_REG_SERIAL_CONTROL) << 3;
  507:         mask = 0xff << shift;
  508:         val = (s->sctl & ~mask) | ((val & 0xff) << shift);
  509:         es1370_maybe_lower_irq (s, val);
  510:         es1370_update_voices (s, s->ctl, val);
  511:         print_sctl (val);
  512:         break;
  513:     default:
  514:         lwarn ("writeb %#x <- %#x\n", addr, val);
  515:         break;
  516:     }
  517: }
  518: 
  519: IO_WRITE_PROTO (es1370_writew)
  520: {
  521:     ES1370State *s = opaque;
  522:     addr = es1370_fixup (s, addr);
  523:     uint32_t shift, mask;
  524:     struct chan *d = &s->chan[0];
  525: 
  526:     switch (addr) {
  527:     case ES1370_REG_CODEC:
  528:         dolog ("ignored codec write address %#x, data %#x\n",
  529:                (val >> 8) & 0xff, val & 0xff);
  530:         s->codec = val;
  531:         break;
  532: 
  533:     case ES1370_R