1: #ifndef FIRMWARE_ABI_H
    2: #define FIRMWARE_ABI_H
    3: 
    4: #ifndef __ASSEMBLY__
    5: /* Open Hack'Ware NVRAM configuration structure */
    6: 
    7: /* Version 3 */
    8: typedef struct ohwcfg_v3_t ohwcfg_v3_t;
    9: struct ohwcfg_v3_t {
   10:     /* 0x00: structure identifier                    */
   11:     uint8_t  struct_ident[0x10];
   12:     /* 0x10: structure version and NVRAM description */
   13:     uint32_t struct_version;
   14:     uint16_t nvram_size;
   15:     uint16_t pad0;
   16:     uint16_t nvram_arch_ptr;
   17:     uint16_t nvram_arch_size;
   18:     uint16_t nvram_arch_crc;
   19:     uint8_t  pad1[0x02];
   20:     /* 0x20: host architecture                       */
   21:     uint8_t  arch[0x10];
   22:     /* 0x30: RAM/ROM description                     */
   23:     uint64_t RAM0_base;
   24:     uint64_t RAM0_size;
   25:     uint64_t RAM1_base;
   26:     uint64_t RAM1_size;
   27:     uint64_t RAM2_base;
   28:     uint64_t RAM2_size;
   29:     uint64_t RAM3_base;
   30:     uint64_t RAM3_size;
   31:     uint64_t ROM_base;
   32:     uint64_t ROM_size;
   33:     /* 0x80: Kernel description                      */
   34:     uint64_t kernel_image;
   35:     uint64_t kernel_size;
   36:     /* 0x90: Kernel command line                     */
   37:     uint64_t cmdline;
   38:     uint64_t cmdline_size;
   39:     /* 0xA0: Kernel boot image                       */
   40:     uint64_t initrd_image;
   41:     uint64_t initrd_size;
   42:     /* 0xB0: NVRAM image                             */
   43:     uint64_t NVRAM_image;
   44:     uint8_t  pad2[8];
   45:     /* 0xC0: graphic configuration                   */
   46:     uint16_t width;
   47:     uint16_t height;
   48:     uint16_t depth;
   49:     uint16_t graphic_flags;
   50:     /* 0xC8: CPUs description                        */
   51:     uint8_t  nb_cpus;
   52:     uint8_t  boot_cpu;
   53:     uint8_t  nboot_devices;
   54:     uint8_t  pad3[5];
   55:     /* 0xD0: boot devices                            */
   56:     uint8_t  boot_devices[0x10];
   57:     /* 0xE0                                          */
   58:     uint8_t  pad4[0x1C]; /* 28 */
   59:     /* 0xFC: checksum                                */
   60:     uint16_t crc;
   61:     uint8_t  pad5[0x02];
   62: } __attribute__ (( packed ));
   63: 
   64: #define OHW_GF_NOGRAPHICS 0x0001
   65: 
   66: static inline uint16_t
   67: OHW_crc_update (uint16_t prev, uint16_t value)
   68: {
   69:     uint16_t tmp;
   70:     uint16_t pd, pd1, pd2;
   71: 
   72:     tmp = prev >> 8;
   73:     pd = prev ^ value;
   74:     pd1 = pd & 0x000F;
   75:     pd2 = ((pd >> 4) & 0x000F) ^ pd1;
   76:     tmp ^= (pd1 << 3) | (pd1 << 8);
   77:     tmp ^= pd2 | (pd2 << 7) | (pd2 << 12);
   78: 
   79:     return tmp;
   80: }
   81: 
   82: static inline uint16_t
   83: OHW_compute_crc (ohwcfg_v3_t *header, uint32_t start, uint32_t count)
   84: {
   85:     uint32_t i;
   86:     uint16_t crc = 0xFFFF;
   87:     uint8_t *ptr = (uint8_t *)header;
   88:     int odd;
   89: 
   90:     odd = count & 1;
   91:     count &= ~1;
   92:     for (i = 0; i != count; i++) {
   93:         crc = OHW_crc_update(crc, (ptr[start + i] << 8) | ptr[start + i + 1]);
   94:     }
   95:     if (odd) {
   96:         crc = OHW_crc_update(crc, ptr[start + i] << 8);
   97:     }
   98: 
   99:     return crc;
  100: }
  101: 
  102: /* Sparc32 runtime NVRAM structure for SMP CPU boot */
  103: struct sparc_arch_cfg {
  104:     uint32_t smp_ctx;
  105:     uint32_t smp_ctxtbl;
  106:     uint32_t smp_entry;
  107:     uint8_t valid;
  108:     uint8_t unused[51];
  109: };
  110: 
  111: /* OpenBIOS NVRAM partition */
  112: struct OpenBIOS_nvpart_v1 {
  113:     uint8_t signature;
  114:     uint8_t checksum;
  115:     uint16_t len; // BE, length divided by 16
  116:     char name[12];
  117: };
  118: 
  119: #define OPENBIOS_PART_SYSTEM 0x70
  120: #define OPENBIOS_PART_FREE 0x7f
  121: 
  122: static inline void
  123: OpenBIOS_finish_partition(struct OpenBIOS_nvpart_v1 *header, uint32_t size)
  124: {
  125:     unsigned int i, sum;
  126:     uint8_t *tmpptr;
  127: 
  128:     // Length divided by 16
  129:     header->len = cpu_to_be16(size >> 4);
  130: 
  131:     // Checksum
  132:     tmpptr = (uint8_t *)header;
  133:     sum = *tmpptr;
  134:     for (i = 0; i < 14; i++) {
  135:         sum += tmpptr[2 + i];
  136:         sum = (sum + ((sum & 0xff00) >> 8)) & 0xff;
  137:     }
  138:     header->checksum = sum & 0xff;
  139: }
  140: 
  141: static inline uint32_t
  142: OpenBIOS_set_var(uint8_t *nvram, uint32_t addr, const unsigned char *str)
  143: {
  144:     uint32_t len;
  145: 
  146:     len = strlen(str) + 1;
  147:     memcpy(&nvram[addr], str, len);
  148: 
  149:     return addr + len;
  150: }
  151: 
  152: /* Sun IDPROM structure at the end of NVRAM */
  153: struct Sun_nvram {
  154:     uint8_t type;
  155:     uint8_t machine_id;
  156:     uint8_t macaddr[6];
  157:     uint8_t unused[7];
  158:     uint8_t checksum;
  159: };
  160: 
  161: static inline void
  162: Sun_init_header(struct Sun_nvram *header, const uint8_t *macaddr, int machine_id)
  163: {
  164:     uint8_t tmp, *tmpptr;
  165:     unsigned int i;
  166: 
  167:     header->type = 1;
  168:     header->machine_id = machine_id & 0xff;
  169:     memcpy(&header->macaddr, macaddr, 6);
  170:     /* Calculate checksum */
  171:     tmp = 0;
  172:     tmpptr = (uint8_t *)header;
  173:     for (i = 0; i < 15; i++)
  174:         tmp ^= tmpptr[i];
  175: 
  176:     header->checksum = tmp;
  177: }
  178: 
  179: #else /* __ASSEMBLY__ */
  180: 
  181: /* Structure offsets for asm use */
  182: 
  183: /* Open Hack'Ware NVRAM configuration structure */
  184: #define OHW_ARCH_PTR   0x18
  185: #define OHW_RAM_SIZE   0x38
  186: #define OHW_BOOT_CPU   0xC9
  187: 
  188: /* Sparc32 runtime NVRAM structure for SMP CPU boot */
  189: #define SPARC_SMP_CTX    0x0
  190: #define SPARC_SMP_CTXTBL 0x4
  191: #define SPARC_SMP_ENTRY  0x8
  192: #define SPARC_SMP_VALID  0xc
  193: 
  194: /* Sun IDPROM structure at the end of NVRAM */
  195: #define SPARC_MACHINE_ID 0x1fd9
  196: 
  197: #endif /* __ASSEMBLY__ */
  198: #endif /* FIRMWARE_ABI_H */