(linenum→info "unix/slp.c:2238")

qemu/0.9.1/hw/i2c.h

    1: #ifndef QEMU_I2C_H
    2: #define QEMU_I2C_H
    3: 
    4: /* The QEMU I2C implementation only supports simple transfers that complete
    5:    immediately.  It does not support slave devices that need to be able to
    6:    defer their response (eg. CPU slave interfaces where the data is supplied
    7:    by the device driver in response to an interrupt).  */
    8: 
    9: enum i2c_event {
   10:     I2C_START_RECV,
   11:     I2C_START_SEND,
   12:     I2C_FINISH,
   13:     I2C_NACK /* Masker NACKed a receive byte.  */
   14: };
   15: 
   16: /* Master to slave.  */
   17: typedef int (*i2c_send_cb)(i2c_slave *s, uint8_t data);
   18: /* Slave to master.  */
   19: typedef int (*i2c_recv_cb)(i2c_slave *s);
   20: /* Notify the slave of a bus state change.  */
   21: typedef void (*i2c_event_cb)(i2c_slave *s, enum i2c_event event);
   22: 
   23: struct i2c_slave
   24: {
   25:     /* Callbacks to be set by the device.  */
   26:     i2c_event_cb event;
   27:     i2c_recv_cb recv;
   28:     i2c_send_cb send;
   29: 
   30:     /* Remaining fields for internal use by the I2C code.  */
   31:     int address;
   32:     void *next;
   33: };
   34: 
   35: i2c_bus *i2c_init_bus(void);
   36: i2c_slave *i2c_slave_init(i2c_bus *bus, int address, int size);
   37: void i2c_set_slave_address(i2c_slave *dev, int address);
   38: int i2c_bus_busy(i2c_bus *bus);
   39: int i2c_start_transfer(i2c_bus *bus, int address, int recv);
   40: void i2c_end_transfer(i2c_bus *bus);
   41: void i2c_nack(i2c_bus *bus);
   42: int i2c_send(i2c_bus *bus, uint8_t data);
   43: int i2c_recv(i2c_bus *bus);
   44: void i2c_bus_save(QEMUFile *f, i2c_bus *bus);
   45: void i2c_bus_load(QEMUFile *f, i2c_bus *bus);
   46: void i2c_slave_save(QEMUFile *f, i2c_slave *dev);
   47: void i2c_slave_load(QEMUFile *f, i2c_slave *dev);
   48: 
   49: /* max111x.c */
   50: struct max111x_s;
   51: uint32_t max111x_read(void *opaque);
   52: void max111x_write(void *opaque, uint32_t value);
   53: struct max111x_s *max1110_init(qemu_irq cb);
   54: struct max111x_s *max1111_init(qemu_irq cb);
   55: void max111x_set_input(struct max111x_s *s, int line, uint8_t value);
   56: 
   57: /* max7310.c */
   58: i2c_slave *max7310_init(i2c_bus *bus);
   59: void max7310_reset(i2c_slave *i2c);
   60: qemu_irq *max7310_gpio_in_get(i2c_slave *i2c);
   61: void max7310_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler);
   62: 
   63: /* wm8750.c */
   64: i2c_slave *wm8750_init(i2c_bus *bus, AudioState *audio);
   65: void wm8750_reset(i2c_slave *i2c);
   66: void wm8750_data_req_set(i2c_slave *i2c,
   67:                 void (*data_req)(void *, int, int), void *opaque);
   68: void wm8750_dac_dat(void *opaque, uint32_t sample);
   69: uint32_t wm8750_adc_dat(void *opaque);
   70: 
   71: /* ssd0303.c */
   72: void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address);
   73: 
   74: #endif
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