1: /*
    2:  * Memory mapped access to ISA IO space.
    3:  *
    4:  * Copyright (c) 2006 Fabrice Bellard
    5:  *
    6:  * Permission is hereby granted, free of charge, to any person obtaining a copy
    7:  * of this software and associated documentation files (the "Software"), to deal
    8:  * in the Software without restriction, including without limitation the rights
    9:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   10:  * copies of the Software, and to permit persons to whom the Software is
   11:  * furnished to do so, subject to the following conditions:
   12:  *
   13:  * The above copyright notice and this permission notice shall be included in
   14:  * all copies or substantial portions of the Software.
   15:  *
   16:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   17:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   18:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   19:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   20:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   21:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   22:  * THE SOFTWARE.
   23:  */
   24: 
   25: #include "hw.h"
   26: #include "isa.h"
   27: 
   28: static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
   29:                                   uint32_t val)
   30: {
   31:     cpu_outb(NULL, addr & 0xffff, val);
   32: }
   33: 
   34: static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
   35:                                   uint32_t val)
   36: {
   37: #ifdef TARGET_WORDS_BIGENDIAN
   38:     val = bswap16(val);
   39: #endif
   40:     cpu_outw(NULL, addr & 0xffff, val);
   41: }
   42: 
   43: static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
   44:                                 uint32_t val)
   45: {
   46: #ifdef TARGET_WORDS_BIGENDIAN
   47:     val = bswap32(val);
   48: #endif
   49:     cpu_outl(NULL, addr & 0xffff, val);
   50: }
   51: 
   52: static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
   53: {
   54:     uint32_t val;
   55: 
   56:     val = cpu_inb(NULL, addr & 0xffff);
   57:     return val;
   58: }
   59: 
   60: static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr)
   61: {
   62:     uint32_t val;
   63: 
   64:     val = cpu_inw(NULL, addr & 0xffff);
   65: #ifdef TARGET_WORDS_BIGENDIAN
   66:     val = bswap16(val);
   67: #endif
   68:     return val;
   69: }
   70: 
   71: static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr)
   72: {
   73:     uint32_t val;
   74: 
   75:     val = cpu_inl(NULL, addr & 0xffff);
   76: #ifdef TARGET_WORDS_BIGENDIAN
   77:     val = bswap32(val);
   78: #endif
   79:     return val;
   80: }
   81: 
   82: static CPUWriteMemoryFunc *isa_mmio_write[] = {
   83:     &isa_mmio_writeb,
   84:     &isa_mmio_writew,
   85:     &isa_mmio_writel,
   86: };
   87: 
   88: static CPUReadMemoryFunc *isa_mmio_read[] = {
   89:     &isa_mmio_readb,
   90:     &isa_mmio_readw,
   91:     &isa_mmio_readl,
   92: };
   93: 
   94: static int isa_mmio_iomemtype = 0;
   95: 
   96: void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size)
   97: {
   98:     if (!isa_mmio_iomemtype) {
   99:         isa_mmio_iomemtype = cpu_register_io_memory(0, isa_mmio_read,
  100:                                                     isa_mmio_write, NULL);
  101:     }
  102:     cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
  103: }