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10: #ifndef __MAINSTONE_H__
11: #define __MAINSTONE_H__
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13:
14: #define MST_FPGA_PHYS 0x08000000
15: #define MST_ETH_PHYS 0x10000300
16: #define MST_FLASH_0 0x00000000
17: #define MST_FLASH_1 0x04000000
18:
19:
20: #define MMC_IRQ 0
21: #define USIM_IRQ 1
22: #define USBC_IRQ 2
23: #define ETHERNET_IRQ 3
24: #define AC97_IRQ 4
25: #define PEN_IRQ 5
26: #define MSINS_IRQ 6
27: #define EXBRD_IRQ 7
28: #define S0_CD_IRQ 9
29: #define S0_STSCHG_IRQ 10
30: #define S0_IRQ 11
31: #define S1_CD_IRQ 13
32: #define S1_STSCHG_IRQ 14
33: #define S1_IRQ 15
34:
35: extern qemu_irq
36: *mst_irq_init(struct pxa2xx_state_s *cpu, uint32_t base, int irq);
37:
38: #endif