1: /*
    2:  * QEMU Acer Pica Machine support
    3:  *
    4:  * Copyright (c) 2007 Herv?oussineau
    5:  *
    6:  * Permission is hereby granted, free of charge, to any person obtaining a copy
    7:  * of this software and associated documentation files (the "Software"), to deal
    8:  * in the Software without restriction, including without limitation the rights
    9:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   10:  * copies of the Software, and to permit persons to whom the Software is
   11:  * furnished to do so, subject to the following conditions:
   12:  *
   13:  * The above copyright notice and this permission notice shall be included in
   14:  * all copies or substantial portions of the Software.
   15:  *
   16:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   17:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   18:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   19:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   20:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   21:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   22:  * THE SOFTWARE.
   23:  */
   24: 
   25: #include "hw.h"
   26: #include "mips.h"
   27: #include "isa.h"
   28: #include "pc.h"
   29: #include "fdc.h"
   30: #include "sysemu.h"
   31: #include "boards.h"
   32: 
   33: #ifdef TARGET_WORDS_BIGENDIAN
   34: #define BIOS_FILENAME "mips_bios.bin"
   35: #else
   36: #define BIOS_FILENAME "mipsel_bios.bin"
   37: #endif
   38: 
   39: #ifdef TARGET_MIPS64
   40: #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
   41: #else
   42: #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
   43: #endif
   44: 
   45: #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
   46: 
   47: #define MAX_IDE_BUS 2
   48: #define MAX_FD 2
   49: 
   50: static const int ide_iobase[2] = { 0x1f0, 0x170 };
   51: static const int ide_iobase2[2] = { 0x3f6, 0x376 };
   52: static const int ide_irq[2] = { 14, 15 };
   53: 
   54: static uint32_t serial_base[MAX_SERIAL_PORTS] = { 0x80006000, 0x80007000 };
   55: static int serial_irq[MAX_SERIAL_PORTS] = { 8, 9 };
   56: 
   57: extern FILE *logfile;
   58: 
   59: static void main_cpu_reset(void *opaque)
   60: {
   61:     CPUState *env = opaque;
   62:     cpu_reset(env);
   63: }
   64: 
   65: static
   66: void mips_pica61_init (int ram_size, int vga_ram_size,
   67:                        const char *boot_device, DisplayState *ds,
   68:                     const char *kernel_filename, const char *kernel_cmdline,
   69:                     const char *initrd_filename, const char *cpu_model)
   70: {
   71:     char buf[1024];
   72:     unsigned long bios_offset;
   73:     int bios_size;
   74:     CPUState *env;
   75:     int i;
   76:     int available_ram;
   77:     qemu_irq *i8259;
   78:     int index;
   79:     BlockDriverState *fd[MAX_FD];
   80: 
   81:     /* init CPUs */
   82:     if (cpu_model == NULL) {
   83: #ifdef TARGET_MIPS64
   84:         cpu_model = "R4000";
   85: #else
   86:         /* FIXME: All wrong, this maybe should be R3000 for the older PICAs. */
   87:         cpu_model = "24Kf";
   88: #endif
   89:     }
   90:     env = cpu_init(cpu_model);
   91:     if (!env) {
   92:         fprintf(stderr, "Unable to find CPU definition\n");
   93:         exit(1);
   94:     }
   95:     register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
   96:     qemu_register_reset(main_cpu_reset, env);
   97: 
   98:     /* allocate RAM (limited to 256 MB) */
   99:     if (ram_size < 256 * 1024 * 1024)
  100:         available_ram = ram_size;
  101:     else
  102:         available_ram = 256 * 1024 * 1024;
  103:     cpu_register_physical_memory(0, available_ram, IO_MEM_RAM);
  104: 
  105:     /* load a BIOS image */
  106:     bios_offset = ram_size + vga_ram_size;
  107:     if (bios_name == NULL)
  108:         bios_name = BIOS_FILENAME;
  109:     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
  110:     bios_size = load_image(buf, phys_ram_base + bios_offset);
  111:     if ((bios_size <= 0) || (bios_size > BIOS_SIZE)) {
  112:         /* fatal */
  113:         fprintf(stderr, "qemu: Error, could not load MIPS bios '%s'\n",
  114:                 buf);
  115:         exit(1);
  116:     }
  117:     cpu_register_physical_memory(0x1fc00000,
  118:                                      BIOS_SIZE, bios_offset | IO_MEM_ROM);
  119: 
  120:     /* Device map
  121:      *
  122:      * addr 0xe0004000: mc146818
  123:      * addr 0xe0005000 intr 6: ps2 keyboard
  124:      * addr 0xe0005000 intr 7: ps2 mouse
  125:      * addr 0xe0006000 intr 8: ns16550a,
  126:      * addr 0xe0007000 intr 9: ns16550a
  127:      * isa_io_base 0xe2000000 isa_mem_base 0xe3000000
  128:      */
  129: 
  130:     /* Init CPU internal devices */
  131:     cpu_mips_irq_init_cpu(env);
  132:     cpu_mips_clock_init(env);
  133:     cpu_mips_irqctrl_init();
  134: 
  135:     /* Register 64 KB of ISA IO space at 0x10000000 */
  136:     isa_mmio_init(0x10000000, 0x00010000);
  137:     isa_mem_base = 0x11000000;
  138: 
  139:     /* PC style IRQ (i8259/i8254) and DMA (i8257) */
  140:     /* The PIC is attached to the MIPS CPU INT0 pin */
  141:     i8259 = i8259_init(env->irq[2]);
  142:     rtc_mm_init(0x80004070, 1, i8259[14]);
  143:     pit_init(0x40, 0);
  144: 
  145:     /* Keyboard (i8042) */
  146:     i8042_mm_init(i8259[6], i8259[7], 0x80005060, 0);
  147: 
  148:     /* IDE controller */
  149: 
  150:     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
  151:         fprintf(stderr, "qemu: too many IDE bus\n");
  152:         exit(1);
  153:     }
  154: 
  155:     for(i = 0; i < MAX_IDE_BUS; i++) {
  156:         int hd0, hd1;
  157:         hd0 = drive_get_index(IF_IDE, i, 0);
  158:         hd1 = drive_get_index(IF_IDE, i, 1);
  159:         isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
  160:                      hd0 == -1 ? NULL : drives_table[hd0].bdrv,
  161:                      hd1 == -1 ? NULL : drives_table[hd1].bdrv);
  162:     }
  163: 
  164:     /* Network controller */
  165:     /* FIXME: missing NS SONIC DP83932 */
  166: 
  167:     /* SCSI adapter */
  168:     /* FIXME: missing NCR 53C94 */
  169: 
  170:     /* ISA devices (floppy, serial, parallel) */
  171: 
  172:     for (i = 0; i < MAX_FD; i++) {
  173:         index = drive_get_index(IF_FLOPPY, 0, i);
  174:         if (index == -1)
  175:             fd[i] = NULL;
  176:         else
  177:             fd[i] = drives_table[index].bdrv;
  178:     }
  179:     fdctrl_init(i8259[1], 1, 1, 0x80003000, fd);
  180:     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
  181:         if (serial_hds[i]) {
  182:             serial_mm_init(serial_base[i], 0, i8259[serial_irq[i]], serial_hds[i], 1);
  183:         }
  184:     }
  185:     /* Parallel port */
  186:     if (parallel_hds[0]) parallel_mm_init(0x80008000, 0, i8259[1], parallel_hds[0]);
  187: 
  188:     /* Sound card */
  189:     /* FIXME: missing Jazz sound, IRQ 18 */
  190: 
  191:     /* LED indicator */
  192:     /* FIXME: missing LED indicator */
  193: 
  194:     /* NVRAM */
  195:     ds1225y_init(0x80009000, "nvram");
  196: 
  197:     /* Video card */
  198:     /* FIXME: This card is not the real one which was in the original PICA,
  199:      * but let's do with what Qemu currenly emulates... */
  200:     isa_vga_mm_init(ds, phys_ram_base + ram_size, ram_size, vga_ram_size,
  201:                     0x40000000, 0x60000000, 0);
  202: 
  203:     /* LED indicator */
  204:     jazz_led_init(ds, 0x8000f000);
  205: }
  206: 
  207: QEMUMachine mips_pica61_machine = {
  208:     "pica61",
  209:     "Acer Pica 61",
  210:     mips_pica61_init,
  211: };